China’s JCET to build new plant in Shanghai to expand advanced chip packaging

Chinese chip-packaging and testing giant Jiangsu Changjiang Electronics Technology (JCET) says it will invest 7.8 billion yuan (US$1.15 billion) to build a new plant, as demand for home-grown chips continues to surge amid the rapid development of artificial intelligence.

A controlled subsidiary with a registered capital of 4 billion yuan would be set up to construct an advanced packaging and testing factory in the Lin-gang Special Area in Shanghai, the company said on Wednesday.

The project will be rolled out in two phases, with the first – covering factory construction and equipment investment – scheduled for completion in the second half of 2028.

JCET, based in China’s eastern Jiangsu province, said the move was aimed at accelerating the expansion of its “high-end” advanced-packaging capacity and enhancing the company’s overall competitiveness.

Advanced packaging – the final step in chip production that involves assembling individual dies into finished products – has become critical to China’s chipmaking capabilities, especially as Washington’s export controls restrict access to advanced manufacturing foundries such as Taiwan Semiconductor Manufacturing Company.

JCET’s Shanghai-listed shares have surged 147 per cent since the beginning of the year on the back of strong growth.

In April, the company reported full-year 2025 revenue of 38.87 billion yuan, up 8.1 per cent, calling it a “record-breaking” performance, though net profit declined 2.75 per cent.

First-quarter revenue this year dipped 1.76 per cent, while net profit surged 42.74 per cent year on year.

At the industry conference Semicon China in March, CEO Zheng Li said advanced packaging would be a core pathway for industry development in the post-Moore’s Law era, where simply shrinking the size of transistors no longer guaranteed computing power gains.

“The focus has shifted from how to increase the number of transistors per unit area to how to improve chip quality,” Zheng said, adding that new-generation packaging technology aimed to reduce surface roughness to below 0.2 nanometre compared with 5nm under the current 2.5D packaging technology.